With the improvement in general living standards, there has been an increasing demand for higher display quality. Meanwhile, as display technology advances, flat panel display has become widely used in everyday life. Currently, the technology to manufacture LCD (liquid-crystal display) devices has become considerably more mature, and LCD display has been widely used in devices with display functions, such as mobile phones, cameras, laptops, TVs, etc.
The great demand for devices with display functions further promotes the development of display technology. New methods and materials used for display technology, e.g., low-temperature poly-silicon and organic display, continue to emerge. For example, AMOLED (Active-Matrix Organic Light-Emitting Diode) display is referred as the next-generation display technology for its great advantages in display quality, performance, and cost over conventional LCDs. Thus, AMOLED display has gained significant attention from display manufacturers all over the world.
AMLCD (Active-Matrix Liquid-Crystal Display) and AMOLED may both use TFTs (Thin Film Transistors) as control elements. Conventional TFTs may be made of a-Si (amorphous silicon), p-Si (poly-silicon), oxide semiconductors, and/or organic thin film transistors. Compared to conventional a-Si, LTPS (Low-Temperature Poly-Silicon) may have more advantages. Thus, LTPS may be considered as an ideal technology for forming AMLCD array substrates and AMOLED array substrates.
Currently, a TFT often includes at least a gate, a source, a drain, and an active layer configured for forming a conductive channel. To manufacture LTPS TFT array substrates using a conventional manufacturing process, the a-Si layer often undergoes a crystallization process through an ELA (Excimer Laser Annealing) process when the active layer is being formed. The grain size of the p-Si, formed from the a-Si after the annealing, may be dependent on the ELA device and the adjustable process window of the device may be limited. However, the p-Si formed through the method described above may have relatively small grain size and an undesirably large amount of grain boundaries. As a result, the p-Si may have undesirably high edge effects in the channel. The formed TFTs may have undesirably high leakage currents.